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authorEfraim Flashner <efraim@flashner.co.il>2023-05-24 16:17:08 +0300
committerEfraim Flashner <efraim@flashner.co.il>2023-05-24 19:16:34 +0300
commitd17ac233eeb2b4a7f7f2f9896feeb035abbafc05 (patch)
tree445710ea9dadaf973a35e0f01f25e7a46e0932e0
parent9fca95b263ca8e02d94c3813399c2c68695e5f48 (diff)
downloadguix-d17ac233eeb2b4a7f7f2f9896feeb035abbafc05.tar
guix-d17ac233eeb2b4a7f7f2f9896feeb035abbafc05.tar.gz
gnu: opensbi: Update to 1.2.
* gnu/packages/firmware.scm (make-opensbi-package): Update to 1.2. [native-inputs]: Add python. [arguments]: Remove trailing #t from phases.
-rw-r--r--gnu/packages/firmware.scm10
1 files changed, 5 insertions, 5 deletions
diff --git a/gnu/packages/firmware.scm b/gnu/packages/firmware.scm
index b6b053b6b4..755d40b0fe 100644
--- a/gnu/packages/firmware.scm
+++ b/gnu/packages/firmware.scm
@@ -481,7 +481,7 @@ provide OpenFirmware functionality on top of an already running system.")
(define* (make-opensbi-package platform name #:optional (arch "riscv64"))
(package
(name name)
- (version "1.1")
+ (version "1.2")
(source
(origin
(method git-fetch)
@@ -490,14 +490,15 @@ provide OpenFirmware functionality on top of an already running system.")
(commit (string-append "v" version))))
(file-name (git-file-name "opensbi" version))
(sha256
- (base32 "0xlnhl965286kvizyjm571qbhj3l5n71a02dmbmgxzcqapzgi9wk"))))
+ (base32 "13k76ngmbs6xk8wm0vhc3fjs5w82g34wxs2zf4r27jd79m47xjb5"))))
(build-system gnu-build-system)
(native-inputs
`(,@(if (and (not (string-prefix? "riscv64" (%current-system)))
(string-prefix? "riscv64" arch))
`(("cross-gcc" ,(cross-gcc "riscv64-linux-gnu"))
("cross-binutils" ,(cross-binutils "riscv64-linux-gnu")))
- '())))
+ '())
+ ("python" ,python)))
(arguments
`(#:tests? #f ; no check target
#:make-flags (list (string-append "PLATFORM=" ,platform)
@@ -523,8 +524,7 @@ provide OpenFirmware functionality on top of an already running system.")
(for-each
(lambda (file)
(install-file file out))
- bin))
- #t)))))
+ bin)))))))
(home-page "https://github.com/riscv-software-src/opensbi")
(synopsis "RISC-V @acronym{SBI, Supervisor Binary Interface} implementation")
(description