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-rw-r--r--gnu/packages/patches/arm-trusted-firmware-disable-hdcp.patch82
1 files changed, 82 insertions, 0 deletions
diff --git a/gnu/packages/patches/arm-trusted-firmware-disable-hdcp.patch b/gnu/packages/patches/arm-trusted-firmware-disable-hdcp.patch
new file mode 100644
index 0000000000..edae2352d9
--- /dev/null
+++ b/gnu/packages/patches/arm-trusted-firmware-disable-hdcp.patch
@@ -0,0 +1,82 @@
+From c7f0cd054578152a250f784bf82c8ca53aa91a02 Mon Sep 17 00:00:00 2001
+From: Ziyuan Xu <xzy.xu@rock-chips.com>
+Date: Tue, 8 Oct 2019 10:27:05 +0800
+Subject: [PATCH] plat/rockchip: cliam a macro to enable hdcp feature for DP
+
+HDCP is using a binary driver, add macro PLAT_RK_DP_HDCP to make it as
+an option.
+
+Change-Id: I54ef1a3635a28e8ae56654bd1e91dfe011520a7f
+Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
+Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
+---
+ plat/rockchip/rk3399/plat_sip_calls.c | 4 ++++
+ plat/rockchip/rk3399/platform.mk | 11 +++++++----
+ 2 files changed, 11 insertions(+), 4 deletions(-)
+
+diff --git a/plat/rockchip/rk3399/plat_sip_calls.c b/plat/rockchip/rk3399/plat_sip_calls.c
+index c2cc5b11c..ce8476c9a 100644
+--- a/plat/rockchip/rk3399/plat_sip_calls.c
++++ b/plat/rockchip/rk3399/plat_sip_calls.c
+@@ -56,17 +56,21 @@ uintptr_t rockchip_plat_sip_handler(uint32_t smc_fid,
+ void *handle,
+ u_register_t flags)
+ {
++#ifdef PLAT_RK_DP_HDCP
+ uint64_t x5, x6;
++#endif
+
+ switch (smc_fid) {
+ case RK_SIP_DDR_CFG:
+ SMC_RET1(handle, ddr_smc_handler(x1, x2, x3, x4));
++#ifdef PLAT_RK_DP_HDCP
+ case RK_SIP_HDCP_CONTROL:
+ SMC_RET1(handle, dp_hdcp_ctrl(x1));
+ case RK_SIP_HDCP_KEY_DATA64:
+ x5 = read_ctx_reg(get_gpregs_ctx(handle), CTX_GPREG_X5);
+ x6 = read_ctx_reg(get_gpregs_ctx(handle), CTX_GPREG_X6);
+ SMC_RET1(handle, dp_hdcp_store_key(x1, x2, x3, x4, x5, x6));
++#endif
+ default:
+ ERROR("%s: unhandled SMC (0x%x)\n", __func__, smc_fid);
+ SMC_RET1(handle, SMC_UNK);
+diff --git a/plat/rockchip/rk3399/platform.mk b/plat/rockchip/rk3399/platform.mk
+index 25c498da8..01577492d 100644
+--- a/plat/rockchip/rk3399/platform.mk
++++ b/plat/rockchip/rk3399/platform.mk
+@@ -57,7 +57,6 @@ BL31_SOURCES += ${RK_GIC_SOURCES} \
+ ${RK_PLAT_COMMON}/aarch64/platform_common.c \
+ ${RK_PLAT_COMMON}/rockchip_sip_svc.c \
+ ${RK_PLAT_SOC}/plat_sip_calls.c \
+- ${RK_PLAT_SOC}/drivers/dp/cdn_dp.c \
+ ${RK_PLAT_SOC}/drivers/gpio/rk3399_gpio.c \
+ ${RK_PLAT_SOC}/drivers/pmu/pmu.c \
+ ${RK_PLAT_SOC}/drivers/pmu/pmu_fw.c \
+@@ -89,17 +88,21 @@ $(eval $(call add_define,RK3399M0FW))
+ RK3399M0PMUFW=${BUILD_M0}/${PLAT_M0}pmu.bin
+ $(eval $(call add_define,RK3399M0PMUFW))
+
++ifdef PLAT_RK_DP_HDCP
++BL31_SOURCES += ${RK_PLAT_SOC}/drivers/dp/cdn_dp.c
++
+ HDCPFW=${RK_PLAT_SOC}/drivers/dp/hdcp.bin
+ $(eval $(call add_define,HDCPFW))
+
++${BUILD_PLAT}/bl31/cdn_dp.o: CCACHE_EXTRAFILES=$(HDCPFW)
++${RK_PLAT_SOC}/drivers/dp/cdn_dp.c: $(HDCPFW)
++endif
++
+ # CCACHE_EXTRAFILES is needed because ccache doesn't handle .incbin
+ export CCACHE_EXTRAFILES
+ ${BUILD_PLAT}/bl31/pmu_fw.o: CCACHE_EXTRAFILES=$(RK3399M0FW):$(RK3399M0PMUFW)
+ ${RK_PLAT_SOC}/drivers/pmu/pmu_fw.c: $(RK3399M0FW)
+
+-${BUILD_PLAT}/bl31/cdn_dp.o: CCACHE_EXTRAFILES=$(HDCPFW)
+-${RK_PLAT_SOC}/drivers/dp/cdn_dp.c: $(HDCPFW)
+-
+ $(eval $(call MAKE_PREREQ_DIR,${BUILD_M0},${BUILD_PLAT}))
+ .PHONY: $(RK3399M0FW)
+ $(RK3399M0FW): | ${BUILD_M0}
+--
+2.20.1
+