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authorEric Bavier <bavier@cray.com>2017-12-07 12:09:09 -0600
committerEric Bavier <bavier@member.fsf.org>2017-12-10 16:04:16 -0600
commitaa5c206348b5606cc82bb1436aca5c9675332993 (patch)
treee43c5e4fc70bf7d1daf273ba31ac179d78fafd1e /gnu/packages/patches
parent7f04197fef905790fd392f8d686d00ae95a0d04c (diff)
downloadguix-aa5c206348b5606cc82bb1436aca5c9675332993.tar
guix-aa5c206348b5606cc82bb1436aca5c9675332993.tar.gz
gnu: jemalloc: Fix tests for aarch64.
* gnu/packages/patches/jemalloc-arm-address-bits.patch: New patch. * gnu/packages/jemalloc.scm (jemalloc)[source]: Use it. * gnu/local.mk (dist_patch_DATA): Add it.
Diffstat (limited to 'gnu/packages/patches')
-rw-r--r--gnu/packages/patches/jemalloc-arm-address-bits.patch39
1 files changed, 39 insertions, 0 deletions
diff --git a/gnu/packages/patches/jemalloc-arm-address-bits.patch b/gnu/packages/patches/jemalloc-arm-address-bits.patch
new file mode 100644
index 0000000000..f2ef24c25a
--- /dev/null
+++ b/gnu/packages/patches/jemalloc-arm-address-bits.patch
@@ -0,0 +1,39 @@
+From 8cfc9dec37b312a2686f602bbcdd102ca07cca99 Mon Sep 17 00:00:00 2001
+From: David Goldblatt <davidgoldblatt@fb.com>
+Date: Fri, 29 Sep 2017 13:54:08 -0700
+Subject: [PATCH] ARM: Don't extend bit LG_VADDR to compute high address bits.
+
+In userspace ARM on Linux, zero-ing the high bits is the correct way to do this.
+This doesn't fix the fact that we currently set LG_VADDR to 48 on ARM, when in
+fact larger virtual address sizes are coming soon. We'll cross that bridge when
+we come to it.
+---
+ include/jemalloc/internal/rtree.h | 12 ++++++++++++
+ 1 file changed, 12 insertions(+)
+
+diff --git a/include/jemalloc/internal/rtree.h b/include/jemalloc/internal/rtree.h
+index b5d4db39..4563db23 100644
+--- a/include/jemalloc/internal/rtree.h
++++ b/include/jemalloc/internal/rtree.h
+@@ -178,9 +178,21 @@ rtree_leaf_elm_bits_read(tsdn_t *tsdn, rtree_t *rtree, rtree_leaf_elm_t *elm,
+
+ JEMALLOC_ALWAYS_INLINE extent_t *
+ rtree_leaf_elm_bits_extent_get(uintptr_t bits) {
++# ifdef __aarch64__
++ /*
++ * aarch64 doesn't sign extend the highest virtual address bit to set
++ * the higher ones. Instead, the high bits gets zeroed.
++ */
++ uintptr_t high_bit_mask = ((uintptr_t)1 << LG_VADDR) - 1;
++ /* Mask off the slab bit. */
++ uintptr_t low_bit_mask = ~(uintptr_t)1;
++ uintptr_t mask = high_bit_mask & low_bit_mask;
++ return (extent_t *)(bits & mask);
++# else
+ /* Restore sign-extended high bits, mask slab bit. */
+ return (extent_t *)((uintptr_t)((intptr_t)(bits << RTREE_NHIB) >>
+ RTREE_NHIB) & ~((uintptr_t)0x1));
++# endif
+ }
+
+ JEMALLOC_ALWAYS_INLINE szind_t