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| author | Leo Famulari <leo@famulari.name> | 2017-01-06 17:14:41 -0500 |
|---|---|---|
| committer | Leo Famulari <leo@famulari.name> | 2017-01-06 17:14:41 -0500 |
| commit | 74288230ea8b2310495dc2739f39ceadcc143fd0 (patch) | |
| tree | 73ba6c7c13d59c5f92b409c94dccfff159e08f4d /gnu/packages/fpga.scm | |
| parent | 92e779592d269ca1924f184496eb4ca832997b12 (diff) | |
| parent | aa21c764d65068783ae31febee2a92eb3d138a24 (diff) | |
| download | guix-74288230ea8b2310495dc2739f39ceadcc143fd0.tar guix-74288230ea8b2310495dc2739f39ceadcc143fd0.tar.gz | |
Merge branch 'master' into core-updates
Diffstat (limited to 'gnu/packages/fpga.scm')
| -rw-r--r-- | gnu/packages/fpga.scm | 18 |
1 files changed, 15 insertions, 3 deletions
diff --git a/gnu/packages/fpga.scm b/gnu/packages/fpga.scm index bb199096dc..f65eae8673 100644 --- a/gnu/packages/fpga.scm +++ b/gnu/packages/fpga.scm @@ -1,5 +1,6 @@ ;;; GNU Guix --- Functional package management for GNU ;;; Copyright © 2016 Danny Milosavljevic <dannym@scratchpost.org> +;;; Copyright © 2016 Theodoros Foradis <theodoros.for@openmailbox.org> ;;; ;;; This file is part of GNU Guix. ;;; @@ -31,7 +32,9 @@ #:use-module (gnu packages bison) #:use-module (gnu packages flex) #:use-module (gnu packages gtk) + #:use-module (gnu packages graphviz) #:use-module (gnu packages libffi) + #:use-module (gnu packages linux) #:use-module (gnu packages zip) #:use-module (gnu packages perl) #:use-module (gnu packages ghostscript) @@ -114,7 +117,7 @@ For synthesis, the compiler generates netlists in the desired format.") (define-public yosys (package (name "yosys") - (version "0.6") + (version "0.7") (source (origin (method url-fetch) (uri @@ -122,7 +125,7 @@ For synthesis, the compiler generates netlists in the desired format.") name "-" version ".tar.gz")) (sha256 (base32 - "02j0c0m9dfyjccynalf0aggj6gy20k7iphpkg5cn6sdirlkv8gmx")) + "0vkfdn4phvkjqlnpqlr6q5f97bgjc3312vj5jf0vf85zqv88dy9x")) (file-name (string-append name "-" version "-checkout.tar.gz")) (modules '((guix build utils))) (snippet @@ -136,6 +139,13 @@ For synthesis, the compiler generates netlists in the desired format.") (string-append "PREFIX=" %output)) #:phases (modify-phases %standard-phases + (add-before 'configure 'fix-paths + (lambda _ + (substitute* "./passes/cmds/show.cc" + (("exec xdot") (string-append "exec " (which "xdot"))) + (("dot -") (string-append (which "dot") " -")) + (("fuser") (which "fuser"))) + #t)) (replace 'configure (lambda* (#:key inputs (make-flags '()) #:allow-other-keys) (zero? (apply system* "make" "config-gcc" make-flags)))) @@ -172,7 +182,6 @@ For synthesis, the compiler generates netlists in the desired format.") (("iverilog_bin=\".*\"") (string-append "iverilog_bin=\"" iverilog "\""))) #t)))))) - ;; TODO add xdot [patch the path to it here] as soon as I find out where it is. (native-inputs `(("pkg-config" ,pkg-config) ("python" ,python) @@ -185,6 +194,9 @@ For synthesis, the compiler generates netlists in the desired format.") `(("tcl" ,tcl) ("readline" ,readline) ("libffi" ,libffi) + ("graphviz" ,graphviz) + ("psmisc" ,psmisc) + ("xdot" ,xdot) ("abc" ,abc))) (home-page "http://www.clifford.at/yosys/") (synopsis "FPGA Verilog RTL synthesizer") |