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| author | Danny Milosavljevic <dannym@scratchpost.org> | 2016-09-27 02:04:58 +0200 |
|---|---|---|
| committer | Efraim Flashner <efraim@flashner.co.il> | 2016-10-09 18:19:22 +0300 |
| commit | 36aa11c7858dce4ea2f55c48452c2a4c1a2fff5f (patch) | |
| tree | dec236d5839622147934bdf22975959ea2ee38eb /gnu/packages/fpga.scm | |
| parent | 92fc940fdb4176e5391176779ddf78b9b600e5e9 (diff) | |
| download | patches-36aa11c7858dce4ea2f55c48452c2a4c1a2fff5f.tar patches-36aa11c7858dce4ea2f55c48452c2a4c1a2fff5f.tar.gz | |
gnu: Add icestorm.
* gnu/packages/fpga.scm (icestorm): New variable.
Signed-off-by: Efraim Flashner <efraim@flashner.co.il>
Diffstat (limited to 'gnu/packages/fpga.scm')
| -rw-r--r-- | gnu/packages/fpga.scm | 40 |
1 files changed, 40 insertions, 0 deletions
diff --git a/gnu/packages/fpga.scm b/gnu/packages/fpga.scm index 3514e94154..e5e1517c44 100644 --- a/gnu/packages/fpga.scm +++ b/gnu/packages/fpga.scm @@ -188,3 +188,43 @@ For synthesis, the compiler generates netlists in the desired format.") (synopsis "FPGA Verilog RTL synthesizer") (description "Yosys synthesizes Verilog-2005.") (license license:isc))) + +(define-public icestorm + (let ((commit "12b2295c9087d94b75e374bb205ae4d76cf17e2f") + (revision "1")) + (package + (name "icestorm") + (version (string-append "0.0-" revision "-" (string-take commit 9))) + (source (origin + (method git-fetch) + (uri (git-reference + (url "https://github.com/cliffordwolf/icestorm.git") + (commit commit))) + (file-name (string-append name "-" version "-checkout")) + (sha256 + (base32 + "1mmzlqvap6w8n4qzv3idvy51arkgn03692ssplwncy3akjrbsd2b")))) + (build-system gnu-build-system) + (arguments + `(#:tests? #f ; no unit tests that don't need an FPGA exist. + #:make-flags (list "CC=gcc" "CXX=g++" + (string-append "PREFIX=" (assoc-ref %outputs "out"))) + #:phases + (modify-phases %standard-phases + (add-after 'unpack 'remove-usr-local + (lambda _ + (substitute* "iceprog/Makefile" + (("-I/usr/local/include") "") + (("-L/usr/local/lib") "")) + #t)) + (delete 'configure)))) + (inputs + `(("libftdi" ,libftdi))) + (native-inputs + `(("python-3" ,python) + ("pkg-config" ,pkg-config))) + (home-page "http://www.clifford.at/icestorm/") + (synopsis "Project IceStorm - Lattice iCE40 FPGAs bitstream tools") + (description "Project IceStorm - Lattice iCE40 FPGAs Bitstream Tools. +Includes the actual FTDI connector.") + (license license:isc)))) |